The present invention relates to a semiconductor device and to a clock correction method.
Many information devices contain a crystal oscillator (mainly a tuning fork crystal oscillator). The tuning fork crystal oscillator has an oscillator frequency for example of 32.768 kHz. Frequency dividing the 32.768 kHz frequency by 215 gives a frequency of 1 Hz. The output clock for the oscillator circuit containing the tuning fork crystal oscillator is therefore utilized as an operation clock called the RTC (Real Time Clock or Real Time Counter).
The RTC just as the name implies, is a circuit for counting the time. Once operation has started the RTC therefore continues operating until the supply of electrical power is cut off. To continuously perform this type of operation the RTC must operate at low-power consumption.
However, this tuning fork crystal oscillator having a frequency of 32.768 kHz generally has temperature characteristics exhibiting a negative quadratic curve. More specifically, this tuning fork crystal oscillator has negative quadratic characteristics that peak at the normal temperature (around 25 degrees). This tuning fork crystal oscillator has a frequency deviation of approximately −100 ppm (parts per million) in the temperature vicinity of −40 degrees and 90 degrees. For example at a frequency deviation of −100 ppm, this error is equivalent to a daily error of 8.64 seconds which is not satisfactory in terms of clock precision. So in order to attain a high-precision of oscillator frequency (typically approximately ±10 ppm), the output clock (pulse) that is output from the oscillator circuit with the internal tuning fork crystal oscillator must be corrected.
Japanese Unexamined Patent Application Publication No. 2000-315121 discloses an RTC circuit having a simple structure that performs time correction. The RTC circuit contains an oscillator to oscillate at a basic clock (frequency for example of 32.768 kHz), and generate a frequency-divided signal from sub-dividing the basic clock. At the same time, a reference clock ┘ having a higher speed and higher precision than the basic clock is utilized to calculate the frequency error of the basic clock output from the oscillator. The oscillator having this correction function within the RTC utilizes the frequency-divided signal as a clock and adds a fixed value to the frequency error to output the cumulative value's MSB (most significant bit) as the correction clock. The frequency error is cumulatively summed during generation of the correction clock and the frequency error is corrected by changing the clock state at the time when the cumulative value was reflected to the above described MSB.
Japanese Unexamined Patent Application Publication No. 2009-222486 discloses a clock device for performing time correction at low-power consumption. This clock device performs error correction of the crystal oscillator by utilizing a clock signal output from a crystal oscillator to measure the time differential (frequency error) between the reference 1PPS signal output from the GPS receiver, and the 1PPS signal generated based on the signal output from the crystal oscillator. However, the correction accuracy of this clock device is unsatisfactory since the error is calculated and corrected based on the clock signal output from the crystal oscillator for correction.